An advanced platform that integrates multiple materials with silicon photonics at large scale while using existing manufacturing methods enables highly efficient devices like couplers, antennas, and polarization rotators.

Silicon photonics has rapidly advanced as a crucial technology for high-speed data communication, leveraging mature complementary metal-oxide-semiconductor (CMOS) process nodes to achieve exceptional device uniformity and scalability at low costs. This integration allows for the mass production of photonic components essential for applications ranging from telecommunications to data centers. However, as the demand for more sophisticated functionalities grows, there is an increasing need to incorporate additional capabilities such as optical memory, Pockels modulation, and magneto-optical activities. These advanced features are essential for enhancing the performance and versatility of photonic systems, enabling more complex and efficient operations. Despite the progress, current heterogeneous integration protocols face significant challenges that hinder the expansion of silicon photonics capabilities. Existing methods are often incompatible with the active silicon processes employed by most photonic foundries, making it difficult to integrate a diverse range of materials without disrupting established manufacturing workflows. This incompatibility restricts the ability to achieve wafer-scale, multimaterial integration, limiting the functionality and performance of photonic devices. Additionally, preserving access to back-end-of-line (BEOL) processes while integrating new materials remains a complex obstacle, preventing the seamless incorporation of advanced materials necessary for next-generation photonic applications.

Technology Description

The heterogeneous photonic integration platform revolutionizes silicon photonics by enabling wafer-scale, multimaterial integration without altering existing foundry processes. Leveraging mature CMOS process nodes, it achieves unmatched device uniformity and scalability at low cost. The platform, which supports a wide range of materials, including phase-change, electro-optic, liquid crystals, and more, facilitates the development of high-performance components such as grating couplers with 93% coupling efficiency, antennas with over 97% diffraction efficiency, and polarization rotators exceeding 99% conversion efficiency. Its architecture offers two main variants: one that bonds a photonic integrated circuit (PIC) to a through-silicon/glass substrate connected to a CMOS wafer, and another that connects the PIC to an interposer or PCB through a TSV/TGV substrate and ball grid array. This design preserves the PIC's back-end-of-line layers and enables bifacial optical and electrical I/O capabilities.

What sets this platform apart is its ability to integrate diverse materials while maintaining compatibility with active silicon-based photonic processes. Traditional heterogeneous integration methods often disrupt existing manufacturing workflows, but this platform preserves access to back-end processes and allows for the seamless addition of advanced functionalities like optical memory and Pockels modulation. Features such as localized field control, nonvolatile memory integration, and smooth backside surfaces for thin film and 2D material integration enhance its versatility and performance. Additionally, the platform’s bifacial I/O and efficient thermal management solutions ensure high device performance and manufacturability. This combination of flexibility, compatibility, and high efficiency makes the platform a significant advancement in photonic integration technology.

Benefits

  • Seamless compatibility with existing CMOS foundry processes, enabling cost-effective scaling
  • Wafer-scale multimaterial integration without altering current manufacturing workflows
  • Exceptional device performance with high-efficiency components (up to 99%)
  • Support for a diverse range of advanced materials, expanding photonic functionalities
  • Preservation of back-end-of-line processes for complex device feature integration
  • Enhanced capabilities including nonvolatile memory and precise localized field control
  • Bifacial optical and electrical I/O for improved device connectivity and performance