Process for Low-Loss Dielectric and Related Structures

Superconducting quantum devices are at the forefront of advancing quantum computing, relying on components like capacitors that require materials with exceptionally low energy loss to preserve quantum coherence. As the field progresses, high-specific-capacitance, low-loss dielectrics are needed to enable efficient and scalable superconducting circuits. Parallel-plate capacitors play a vital role in these systems by providing essential coupling elements for qubits and resonators. Enhancing the dielectric properties of these capacitors is essential for improving device performance, reducing decoherence, and allowing the development of complex, reliable quantum computing architectures. However, existing dielectric materials and capacitor designs present significant challenges in superconducting quantum devices. Traditional coplanar and conventional parallel-plate capacitors often use bulk dielectrics that have higher loss tangents, resulting in energy dissipation and lower quality factors. Additionally, the presence of two-level systems within these dielectrics contributes to decoherence, undermining the stability and efficiency of quantum operations. Achieving ultrathin dielectric layers without inducing Josephson tunneling or compromising structural integrity remains difficult with current fabrication methods, leading to inadequate capacitance and uniformity across devices. These limitations restrict the scalability and performance of superconducting quantum systems, highlighting the need for improved dielectric materials and advanced fabrication techniques.

Technology Description

The technology utilizes advanced fabrication methods to create low-loss, high-specific-capacitance parallel-plate capacitors (PPCs) optimized for superconducting quantum devices. By employing aluminum oxide (AlOx) as the dielectric material, the capacitors achieve superior loss characteristics. The fabrication process involves shadow-evaporation techniques, such as the Dolan bridge, which allow for the deposition of ultrathin AlOx layers between 5 and 10 nm. This precise control of dielectric thickness minimizes dielectric volume, effectively reducing two-level systems' density, a common source of loss in quantum devices. The process is compatible with various qubit-fabrication methods and is implemented on high-resistivity silicon substrates, ensuring uniformity and scalability across large wafers.

What sets this technology apart is its meticulous dielectric thickness control achieved through a cyclical deposition and oxidation process conducted under vacuum conditions. By repeatedly depositing thin aluminum layers and oxidizing them, the final dielectric thickness can be precisely determined by the number of cycles. This process results in exceptional performance metrics, including low DC leakage currents, high quality factors, and minimal loss tangents. Additionally, the capacitors demonstrate excellent uniformity and compatibility with existing fabrication processes, enabling seamless integration into superconducting circuits. These features collectively enhance specific capacitance and reduce sensitivity to lossy dielectrics, facilitating more efficient, reliable quantum computing hardware.