Publications

Electronically shuttered solid-state imagers are being developed for high-speed imaging applications. A 5 cmx5 cm, 512x512-element, multiframe charge-coupled device (CCD) imager has been fabricated for the Los Alamos National Laboratory DARHT facility that collects four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology designed for back-illuminated CCDs. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with short integration times (100 ps to 1 ns). Proposed device architectures use CMOS technology for high speed sampling (tens of picoseconds transistor switching times). Techniques for parallel clock distribution, that triggers the sampling of x-ray photoelectrons, will be described that exploit features of CMOS technology.

The variance versus average signal has been measured for a pixel in an electronically shuttered and back-illuminated CCD imaging array. The measurements demonstrate that, over a certain operating range, the electronic shutter modifies the input Poisson distributed photoelectrons during the collection process such that the charge signal accumulated in the CCD well has a sub-Poisson distribution (variance less than a mean). A simple one-dimensional model has been developed that explains the experimental results.