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Polymer matrix effects on acid generation

Published in:
SPIE Vol. 6923, Advances in Resist Materials and Processing Technology XXV, 24-29 February 2008, 692319.

Summary

We have measured the acid generation efficiency with EUV exposure of a PAG in different polymer matrixes representing the main classes of resist polymers as well as some previously described fluoropolymers for lithographic applications. The polymer matrix was found to have a significant effect on the acid generation efficiency of the PAG studied. A linear relationship exists between the absorbance of the resist and the acid generation efficiency. A second inverse relationship exists between Dill C and aromatic content of the resist polymer. It was shown that polymer sensitization is important for acid generation with EUV exposure and the Dill C parameter can be increased by up to five times with highly absorbing non-aromatic polymers, such as non-aromatic fluoropolymers, over an ESCAP polymer. The increase in the Dill C value will lead to an up to five fold increase in resist sensitivity. It is our expectation that these insights into the nature of polymer matrix effects on acid generation could lead to increased sensitivity for EUV resists.
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Summary

We have measured the acid generation efficiency with EUV exposure of a PAG in different polymer matrixes representing the main classes of resist polymers as well as some previously described fluoropolymers for lithographic applications. The polymer matrix was found to have a significant effect on the acid generation efficiency of...

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X-band receiver front-end chip in silicon germanium technology

Published in:
2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 23-25 January 2008.

Summary

This paper reports a demonstration of X-band receiver RF front-end components and the integrated chipset implemented in 0.18 mum silicon germanium (SiGe) technology. The system architecture consists of a single down conversion from X-band at the input to S-band at the intermediate frequency (IF) output. The microwave monolithic integrated circuit (MMIC) includes an X-band low noise amplifier, lead-lag splitter, balanced amplifiers, double balanced mixer, absorptive filter, and an IF amplifier. The integrated chip achieved greater than 30 dB of gain and less than 6 dB of noise figure.
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Summary

This paper reports a demonstration of X-band receiver RF front-end components and the integrated chipset implemented in 0.18 mum silicon germanium (SiGe) technology. The system architecture consists of a single down conversion from X-band at the input to S-band at the intermediate frequency (IF) output. The microwave monolithic integrated circuit...

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Design approaches for digitally dominated active pixel sensors: leveraging Moore's law scaling in focal plane readout design

Summary

Although CMOS technology scaling has provided tremendous power and circuit density benefits for innumerable applications, focal plane array (FPA) readouts have largely been left behind due to dynamic range and signal-to-noise considerations. However, if an appropriate pixel front end can be constructed to interface with a mostly digital pixel, it is possible to develop sensor architectures for which performance scales favorably with advancing technology nodes. Although the front-end design must be optimized to interface with a particular detector, the dominant back end architecture provides considerable potential for design reuse. In this work, digitally dominated long wave infrared (LWIR) active pixel sensors with cutoff wavelengths between 9 and 14.5 um are demonstrated. Two ROIC designs are discussed, each fabricated in a 90-nm digital CMOS process and implementing a 256 x 256 pixel array on a 30-um pitch. In one of the implemented designs, the feasibility of implementing a 15-um pixel pitch FPA with a 500 million electron effective well depth, less than 0.5% non-linearity in the target range and a measured NEdT of less than 50 mK at f/4 and 60 K is demonstrated. Simple on-FPA signal processing allows for a much reduced readout bandwidth requirement with these architectures. To demonstrate the potential for commonality that is offered by a digitally dominated architecture, this LWIR sensor design is compared and contrasted with other digital focal plane architectures. Opportunities and challenges for application of this approach to various detector technologies, optical wavelength ranges and systems are discussed.
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Summary

Although CMOS technology scaling has provided tremendous power and circuit density benefits for innumerable applications, focal plane array (FPA) readouts have largely been left behind due to dynamic range and signal-to-noise considerations. However, if an appropriate pixel front end can be constructed to interface with a mostly digital pixel, it...

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All silicon infrared photodiodes: photo response and effects of processing temperature

Summary

CMOS compatible infrared waveguide Si photodiodes are made responsive from 1100 to 1750 nm by Si+ implantation and annealing. This article compares diodes fabricated using two annealing temperatures, 300 and 475C. 0.25-mm-long diodes annealed to 300C have a response to 1539 nm radiation of 0.1 A W-1 at a reverse bias of 5 V and 1.2 A W-1 at 20 V. 3-mm-long diodes processed to 475C exhibited two states, L1 and L2, with photo responses of 0.3 +/-0.1 A W-1 at 5 V and 0.7 +/-10.2 A W-1 at 20 V for the L1 state and 0.5 +/-0.2 A W-1 at 5 V and 4 to 20 A W-1 at 20 V for the L2 state. The diodes can be switched between L1 and L2. The bandwidths vary from 10 to 20 GHz. These diodes will generate electrical power from the incident radiation with efficiencies from 4 to 10 %.
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Summary

CMOS compatible infrared waveguide Si photodiodes are made responsive from 1100 to 1750 nm by Si+ implantation and annealing. This article compares diodes fabricated using two annealing temperatures, 300 and 475C. 0.25-mm-long diodes annealed to 300C have a response to 1539 nm radiation of 0.1 A W-1 at a reverse...

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Irreversible electrowetting on thin fluoropolymer films

Published in:
Langmuir, Vol. 23, No. 24, 20 November 2007, pp. 12429-12435.

Summary

A study was conducted to investigate electrowetting reversibility associated with repeated voltage actuations for an aqueous droplet situated on a silicon dioxide insulator coated with an amorphous fluoropolymer film ranging in thickness from 20 to 80 nm. The experimental results indicate that irreversible trapped charge may occur at the aqueous-solid interface, giving rise to contact angle relaxation. The accumulation of trapped charge was found to be related to the applied electric field intensity and the breakdown strength of the fluoropolymer. On the basis of the data, an empirical model was developed to estimate the amount of trapped charge in the fluoropolymer as well as the voltage threshold for the onset of irreversible electrowetting.
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Summary

A study was conducted to investigate electrowetting reversibility associated with repeated voltage actuations for an aqueous droplet situated on a silicon dioxide insulator coated with an amorphous fluoropolymer film ranging in thickness from 20 to 80 nm. The experimental results indicate that irreversible trapped charge may occur at the aqueous-solid...

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A low-loss double-tuned transformer

Published in:
IEEE Microw. Wirel. Compon. Lett., Vol. 17, No. 11, November 2007, pp. 772-774.

Summary

In this letter, we present a state-of-the-art, planar double-tuned transformer using high- , micromachined spiral inductors and integrated capacitors. This circuit provides a 4:1 impedance transformation over a 30% bandwidth centered at 4.06 GHz, with a minimum insertion loss of 1.50 dB. The fabricated circuit occupies a total area of 440 500 m2 and finds application in power amplifier and other matching applications. An accurate lumped-element circuit model and design tradeoffs are presented. We believe this is the first implementation of a planar microwave double-tuned transformer.
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Summary

In this letter, we present a state-of-the-art, planar double-tuned transformer using high- , micromachined spiral inductors and integrated capacitors. This circuit provides a 4:1 impedance transformation over a 30% bandwidth centered at 4.06 GHz, with a minimum insertion loss of 1.50 dB. The fabricated circuit occupies a total area of...

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Advanced trigger development

Published in:
Lincoln Laboratory Journal, Vol. 17, No. 1, November 2007, pp. 29-62.

Summary

The deadliest form of a biological attack is aerosolized agents dispersed into the atmosphere. Early detection of aerosolized biological agents is important for defense against these agents. Because of the wide range of possible attack scenarios and attack responses, there is also a wide range of detector requirements. This article focuses on real-time, single-particle, optically based bio-agent trigger detectors--the first responder to an aerosol attack--and how to engineer these detectors to achieve optimal detection performance.
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Summary

The deadliest form of a biological attack is aerosolized agents dispersed into the atmosphere. Early detection of aerosolized biological agents is important for defense against these agents. Because of the wide range of possible attack scenarios and attack responses, there is also a wide range of detector requirements. This article...

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Design of an optical photon counting array receiver system for deep-space communications

Summary

Demand for increased capacity in deep-space to Earth communications systems continues to rise as sensor data rates climb and mission requirements expand. Optical freespace laser communications systems offer the potential for operating at data rates 10 to 1000 times that of current radiofrequency systems. A key element in an optical communications system is the Earth receiver. This paper reviews the design of a distributed photon-counting receiver array composed of four meter-class telescopes, developed as a part of the Mars Laser Communications Demonstration (MLCD) project. This design offers a cost-effective and adaptable alternative approach to traditional large, single-aperture receive elements while preserving the expected improvement in data rates enabled by free-space laser communications systems. Key challenges in developing distributed receivers and details of the MLCD design are discussed.
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Summary

Demand for increased capacity in deep-space to Earth communications systems continues to rise as sensor data rates climb and mission requirements expand. Optical freespace laser communications systems offer the potential for operating at data rates 10 to 1000 times that of current radiofrequency systems. A key element in an optical...

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Scaling three-dimensional SOI integrated-circuit technology

Published in:
2007 IEEE Int. SOI Conf. Proc., 1-4 October 2007, pp. 87-88.

Summary

Introduction At Lincoln Laboratory, we have established a three dimensional (3D) integrated circuit (IC) technology that has been developed and demonstrated over seven designs, bonding two or three active circuit layers or tiers to form monolithically integrated 3D circuits. Key features of our 3DIC technology include fully depleted SOI (FDSOI) circuit fabrication, low-temperature wafer-scale oxide-to-oxide bonding, precision wafer-to-wafer alignment, and dense unrestricted 3D vias interconnecting stacked circuit layers, successfully demonstrated in a large area 8 x 8 mm2 high-3D-via-count 1024 x 1024 visible imager. In this paper, we describe details of our bonding protocol for 150-mm diameter wafers, leading to a 50% increase in oxide-oxide bond strength and demonstration of +--0.5 am wafer-to-wafer alignment accuracy. We have established design rules for our 3DIC technology, have quantified process factors limiting our design-rule 3D via pitch, and have demonstrated next generation 3D vias with a 2x size reduction, stacked 3D vias, a backmetal interconnect process to reduce 2D circuit exclusion zones, and buried oxide (BOX) vias to allow both electrical and thermal substrate connections. All of these improvements will allow us to continue to reduce minimum 3D via pitch and reduce 2D layout limitations, making our 3DIC technology more attractive to a broader range of applications.
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Summary

Introduction At Lincoln Laboratory, we have established a three dimensional (3D) integrated circuit (IC) technology that has been developed and demonstrated over seven designs, bonding two or three active circuit layers or tiers to form monolithically integrated 3D circuits. Key features of our 3DIC technology include fully depleted SOI (FDSOI)...

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Back-illuminated three-dimensionally integrated CMOS image sensors for scientific applications

Published in:
SPIE Vol. 6690, Focal Plane Arrays for Space Telescopes III, 27-28 August 2007, 669009.

Summary

SOI-based active pixel image sensors have been built in both monolithic and vertically interconnected pixel technologies. The latter easily supports the inclusion of more complex pixel circuitry without compromising pixel fill factor. A wafer-scale back-illumination process is used to achieve 100% fill factor photodiodes. Results from 256 x 256 and 1024 x 1024 pixel arrays are presented, with discussion of dark current improvement in the differing technologies.
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Summary

SOI-based active pixel image sensors have been built in both monolithic and vertically interconnected pixel technologies. The latter easily supports the inclusion of more complex pixel circuitry without compromising pixel fill factor. A wafer-scale back-illumination process is used to achieve 100% fill factor photodiodes. Results from 256 x 256 and...

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